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NASA-DOD Lead-Free Electronics (Project 2)
Project Number: NT.1504

POC: Brian Greene, NASA TEERM Principal Center (321-867-8481)


NASA’s earlier lead-free solder high-reliability testing effort helped shed light on the reliability of circuit cards manufactured with lead-free solders. However, that project was not able to fully explore rework and mixed solder alloys. As the transition to lead-free becomes an ever-closer reality for military and aerospace applications, it will be critical to fully understand the implications of rework and mixed solder alloys.

This joint project of Department of Defense (DoD), NASA and defense and space contractor representatives built on the results from the former NASA-led lead-free solder project. The new effort focused on the rework of tin-lead and lead-free solder alloys and included the mixing of tin-lead / lead-free & lead-free/ tin-lead solder alloys.


In response to concerns about risks from lead-free induced faults to high reliability products, NASA has outlined a multi-year project to provide manufacturers and users with data to clarify the risks of lead-free materials in their products. The project will also be of potential interest to component manufacturers supplying to high reliability markets. The project was launched in November 2006. The primary technical objective of the project was to undertake comprehensive testing to generate information on failure modes/criteria to better understand the reliability of packages (e.g., Thin Small Outline Package, Ball Grid Array, Plastic (Dual Inline Package) assembled and reworked with lead-free alloys and with mixed (lead/lead-free) alloys).

The assembled boards were subjected to accelerated testing (e.g., thermal, vibration) to understand solder joint reliability.

Period of Performance

  • November 2006 to December 2011.


NASA Centers (Kennedy Space Center, Jet Propulsion Laboratory, Marshall Space Flight Center, Johnson Space Center, Goddard Space Flight Center, Ames Research Laboratory), NASA contractors (United Space Alliance-Solid Rocket Booster, Boeing-Orbiter), major commercial and defense aerospace contractors (BAE Systems, Boeing, Lockheed Martin, Raytheon, Rockwell Collins), Air Force, Army, Navy, Marines, Dept. of Energy and other private entities.


  • Project builds off of the previous NASA lead-free project
  • Data generated from this project is required to gain a better understanding of how lead-free electronics will perform in high-reliability aerospace applications
  • Even though NASA and the aerospace community are exempt from lead-free laws and regulations, there may not be enough suppliers available to meet needs
  • Military and aerospace contractors are receiving unwanted electronics components with lead-free finishes.

Document Status


SMTAI 2010
Lead-Free Soldering Technology Symposium


SMTAI 2011
Lead-Free Soldering Technology Symposium

Completed Activities

Associated Effort
Crane Division, Naval Surface Warfare Center, a NASA-DOD Consortium member, is adding 30 test vehicles to the NASA-DOD study in support of their Naval Supply Command (NAVSUP) sponsored “Logistics Impact of Lead-Free Circuits/Components” project. The primary purpose of the 30 test vehicles add-on is to perform multiple pass SnPb rework 1 and 2 times on random Pb-free DIP, TQFP-144, TSOP-50, LCC and QFN components from SAC305 and SN100C soldered assemblies. BEST Inc will perform the QFN rework for NAVSEA Crane.

The reworked test vehicles will be integrated into the NASA-DOD -55°C to +125°C thermal cycling testing (Rockwell Collins). Drop testing (Celestica) will be run as an identical parallel test to minimize variation between the NASA-DOD and Crane test data. Celestica will perform the vibration testing for Crane as the NASA-DOD testing facility cannot accommodate the Crane vibration test vehicles.

The goal of this testing is to generate initial data supporting the qualification of existing SnPb rework procedures for all military hardware built with Pb-free processes through analysis of thermal cycling, vibration, and drop test data, with subsequent microsection analysis. Questions to be answered by this testing include:

  1. Effect of X1 and X2 rework on assembly reliability as tested by thermal cycle, vibration, and drop test.
  2. Are Pb-free assemblies reworked with SnPb as reliable as as-built lead free hardware?
  3. How residual Pb-free solder contamination levels in SnPb joints after X1 and X2 rework correlate to reliability? Each rework cycle should reduce contamination levels and analysis of solder samples will tell residual levels.
  4. Effect of X1 and X2 SnPb rework on surface mount land thickness (copper erosion) by cross section.
  5. Visual evidence of X1 and X2 rework damage to 170Tg laminate.

Harsh Environments Testing

  • Area Array X-Ray Analysis

  • Once test vehicle assembly was completed, all test vehicles were shipped to Lockheed Martin for x-ray analysis of the area array components, BGA and CSP.  The QFN components were analyzed as well.  Percentage of voiding as well as ball shape were documented. 

    Automated X-Ray of Circuit Card Assemblies

    Interconnect Stress Test (IST);  PWB Interconnect Solutions Inc.
    IST has the capability of effectively/rapidly quantify the integrity of both the Plated Through Hole (PTH) and the unique ability to identify the presence & levels of post separations within the multilayer board (MLB). IST both compliments and/or dramatically reduces the levels of microsection analysis required for PWB interconnect quality assessment.

    The IST principles are unique in that they simultaneously quantify the integrity of both the PTH and its interconnections to the internal layers (posts) throughout accelerated stress testing. IST creates a uniform strain from within the substrate, the interconnects ability to distribute and redistribute this strain provides an indication of integrity. The plated barrels and inner layer junctions are “exercised” until the initial failure mode/mechanism is uncovered.

    Additional Activities

    Lead-free Technology Experiment in Space Environment (LTESE):
    LTESE is a response to the Joint Council on Aging Aircraft (JCAA)/ Joint Group on Pollution Prevention (JG-PP) Lead-Free Solder Project, Joint Test Report, July 27, 2007 recommendations that next steps for aerospace and defense Pb-free applications include experiments to determine the effect of higher reflow temperatures on printed wiring boards and functional integrated circuits, and to gather data in operational environments. LTESE will gather data in operational environments.

    Materials Analysis Report Center for Advanced Vehicle and Extreme Environment Electronics (CAVE3) Auburn University

    Whisker Search on JCAA-JGPP Test Vehicle Boards; Antonio Palmerin, SAIC Intern - Purdue Technology Center Merrillville Indiana

    Printed Trace Testing

    Investigation of printed tracesA-DoD Lead-Free Electronics Project is investigating printed trace technology as a possible rework procedure for printed wiring assemblies.  The deposition or prototyping technologies used for creating printable electronics emerged from a Defense Advanced Research Projects Agency (DARPA) program titled Mesoscale Integrated Conformal Electronics (MICE). The program ran from 1998 through 2003 and developed a number of advanced direct write technologies. The Center for Accelerated Applications at the Nanoscale (CAAN) at the South Dakota School of Mines and Radiance Technologies are working to further refine the technologies for DoD applications.

    New Mexico Tech Lead-Free Solder Research
    The Microelectronics Testing and Technology Obsolescence Program (METTOP) is a small microelectronics testing and research facility located at New Mexico Tech, in Socorro, NM. The facility recently started a lead-free solder research program, to assist in mitigating Diminishing Manufacturing Sources and Material Shortages (DMSMS) issues and concerns regarding reliability-information, or the lack there of, on lead-free solders for use in Military and Aerospace applications. METTOP joined with Naval Surface Warfare Center (NSWC) Crane and Purdue University on their Project 1722-Impact of Lead-Free Components on Military Repair. The purpose of this project is to develop with NAVSEA Crane a technical team of industry, academia and military to evaluate existing data and recommend strategy for DOD on military electronics affected by the lead-free initiative. Emphasis is placed in four areas: tin whiskers, solder joint reliability, copper dissolution and cross-contamination. METTOP has focused on the issue of solder joint reliability, particularly in the area of vibration testing.


    Updated 10/03/2012